CPU simulator written in C

[/* frank */]

I have to do a homework: make a CPU simulator using C language.

I have a set of asm instructions so I have to write a program
that should:
- load .asm file
- view .asm file
- do a step by step simulation
- display registers contents

I tried to search con google with no success.

Any help (links, tricks/tips...)
would be really appreciated.

Thanks in advance.

[Case]

Eric Sosman wrote:

Case - wrote:

Dan Pop wrote:

In <40************ ***********@new s.xs4all.nl> Case <[e-mail]> writes:
The key idea is to map all parts of a CPU on C structures
and routines. For example: the program counter (PC) can
be simply mapped to an int variable.


An usigned integer type would be a much better choice for the program
counter. Ditto for the other integer registers.

I didn't say what kind of int, so technically what you propose
is covered by my statement ;-)

Yes, you're right, the PC is best typed as unsigned. I'm not sure
about the registers. Values in registers are seen as 2-s complement
by instruction in at least some CPU's (e.g., MIPS has pairs of
similar instructions for singed and unsigned register operand).

Note that you must issue the occasional no-op when
using instructions of the first type, to give the singed
registers time to cool.

I've worked on a MIPS assembler for a short while, and know
all about NOPs in delay slots; but I can't remember to have
seen any code in that assembler generating cooling NOPs.

So, is this somekind of joke, or a cool feature? :-)

Case

[Dan Pop]

In <40************ **********@drea der2.news.tisca li.nl> Case - <[e-mail]> writes:

Dan Pop wrote:

In <40************ ***********@new s.xs4all.nl> Case <[e-mail]> writes:

The key idea is to map all parts of a CPU on C structures
and routines. For example: the program counter (PC) can
be simply mapped to an int variable.

An usigned integer type would be a much better choice for the program
counter. Ditto for the other integer registers.

I didn't say what kind of int, so technically what you propose
is covered by my statement ;-)

Nope, in C int is a synonym for signed int:

2 At least one type specifier shall be given in the declaration
specifiers in each declaration, and in the specifier-qualifier
list in each struct declaration and type name. Each list of
type specifiers shall be one of the following sets (delimited
by commas, when there is more than one set on a line); the type
specifiers may occur in any order, possibly intermixed with the
other declaration specifiers.
....
- int, signed, or signed int
....

Dan
--
Dan Pop
DESY Zeuthen, RZ group
Email: Da*****@ifh.de

[Dan Pop]

In <40************ **********@drea der2.news.tisca li.nl> Case - <[e-mail]> writes:

Yes, you're right, the PC is best typed as unsigned. I'm not sure
about the registers.
I am. Think hard about the properties of two's complement arithmetic and
the semantics of unsigned arithmetic in C.
Values in registers are seen as 2-s complement
by instruction in at least some CPU's (e.g., MIPS has pairs of
similar instructions for singed and unsigned register operand).

That's why you want unsigned, which nicely simulates two's complement
behaviour.

CISC CPUs using two's complement have only one ADD instruction and set
their flags according to the result (if the Carry flag is set, unsigned
overflow occured, if the Overflow flag is set, signed overflow occured).
If no flag is set, the result is correct if interpreted as both signed
and unsigned. Implementing this in C, using unsigned arithmetic, is left
as an exercise for the reader.

Dan
--
Dan Pop
DESY Zeuthen, RZ group
Email: Da*****@ifh.de

[CBFalconer]

Case wrote:

Eric Sosman wrote:

Case - wrote:

Dan Pop wrote:
.... snip ...
Yes, you're right, the PC is best typed as unsigned. I'm not sure
about the registers. Values in registers are seen as 2-s complement
by instruction in at least some CPU's (e.g., MIPS has pairs of
similar instructions for singed and unsigned register operand).

Note that you must issue the occasional no-op when
using instructions of the first type, to give the singed
registers time to cool.

I've worked on a MIPS assembler for a short while, and know
all about NOPs in delay slots; but I can't remember to have
seen any code in that assembler generating cooling NOPs.

So, is this somekind of joke, or a cool feature? :-)

It's a cool feature, else those singed registers are liable to
char, which would make them incapable of holding anything
passively unsinged.

--
Chuck F (cb********@yah oo.com) (cb********@wor ldnet.att.net)
Available for consulting/temporary embedded and systems.
<http://cbfalconer.home .att.net> USE worldnet address!

[CBFalconer]

Dan Pop wrote:

.... snip ...
Many of these people were vendors of such products. But, of
course, you know better than them...

^^^^
Aha! Finally caught in an English inaccuracy. They. :-)

--
Chuck F (cb********@yah oo.com) (cb********@wor ldnet.att.net)
Available for consulting/temporary embedded and systems.
<http://cbfalconer.home .att.net> USE worldnet address!

[Eric Sosman]

John Cochran wrote:

In article <40************ **@sun.com>,
Eric Sosman <Er*********@Su n.COM> wrote:
SNIP....`

I once worked on an actual machine whose program counter
registers (there were two) were signed -- the explanation
given was that the same circuitry implemented all the machine's
registers, so the signedness of the PCs was just a by-product
of parsimonious hardware design. However, only the low-order
bits of the active PC participated in address generation; the
sign bits and high-order bits were simply ignored.

So far, just an amusing peculiarity. But the really odd
thing was that the operation of "increment the program counter"
was implemented as the arithmetic operation "add one to the
program counter" -- so if the PC contained a negative value,
the effect was that the program ran backwards! I got some
diversion out of dreaming up a code sequence that executed
in the usual fashion for a while and then negated the PC and
"backed out" by re-executing the preceding instructions in
reverse order ...

Huh?

0x8000 = -32768
0x8000 + 1 = 0x8001 = -32767
0x8001 + 1 = 0x8002 = -32766
...

Show me where adding 1 to a negative binary number will cause the low
order bits to "run backwards" compared to adding 1 to an unsigned binary
number.

It seems I neglected to mention that the machine used
signed magnitude representation for negative integers:

-32768 = 0x800000008000
-32768 + 1 = -32767 = 0x800000007FFF
-32767 + 1 = -32766 = 0x800000007FFE
...

Sorry for the omission. Honeywell 8200, IIRC, and I think
the year was 1968.

--
Er*********@sun .com

[Dan Pop]

In <40************ ***@yahoo.com> CBFalconer <cb********@yah oo.com> writes:

Dan Pop wrote:

... snip ...

Many of these people were vendors of such products. But, of
course, you know better than them...

^^^^
Aha! Finally caught in an English inaccuracy. They. :-)

If this is my first English inaccuracy you've caught in one of my posts,
you must be *really* reading them with your brain firmly set into Neutral.

Given that I've never even tried to learn the proper English grammar and
that I'm posting quite a lot, there *must* be several English mistakes in
my daily output... (without even mentioning typos and omitted words)

Dan
--
Dan Pop
DESY Zeuthen, RZ group
Email: Da*****@ifh.de

[RoSsIaCrIiLoIA]

On 23 Jun 2004 19:57:26 GMT, (Gordon Burditt) wrote:

This is not a Unix item but strictly a PC item as follows:

union REGS {
struct WORDREGS x;
struct BYTEREGS h;
};

struct WORDREGS {
unsigned int ax, bx, cx, dx;
unsigned int si, di, cflag, flags;
};

struct BYTEREGS {
unsigned char al, ah, bl, bh;
unsigned char cl, ch, dl, dh;
};

These structures allow C programs on PCs to access the CPU registers.

AX,BX,CX,DX,S I,DI,CF(carry flag),and FLAGS are all Intel 80x86
registers
AL/AH,BL/BH,CL/CH,DL/DH are pseudo 8 bit registers which are derived
from the
AL = Low half of AX, AH = High half of AX, etc.

I have to really wonder about this design for a CPU emulator. Some
of the registers listed above share storage (for example, ax consists
of ah and al concatenated, and eax contains ax). Every time you
change one register (e.g. eax, ax, al, or ah), you have to change
all of them, or keep track of which one is more up to date. This
tends to make things slow. and bug-prone, if you're not careful.
Assembly code WILL occasionally make use of this fact, for example,
loading ah with 0 to do an unsigned-extension of al into ax may be
the fastest way to accomplish this.

The "union r32" in my PC seems like a x86 general pourpose register
Are you agree?

#include <stdio.h>
#include <stdint.h> /* or stddef don't remember for uintxx_t */
union r32
{
union
{
struct
{
uint8_t l;
uint8_t h;
}b;
uint16_t val;
}w;
uint32_t val;
};
/* all global */
union r32 eax_, ebx_, ecx_, edx_;
union r32 esi_, edi_, ebp_, esp_, eip_;
uint16_t cs, ds, es, ss, fs, gs, flags;

#define eax (eax_.val)
#define ax (eax_.w.val)
#define al (eax_.w.b.l)
#define ah (eax_.w.b.h)

#define ebx (ebx_.val)
#define bx (ebx_.w.val)
#define bl (ebx_.w.b.l)
#define bh (ebx_.w.b.h)

#define ecx (ecx_.val)
#define cx (ecx_.w.val)
#define cl (ecx_.w.b.l)
#define ch (ecx_.w.b.h)

#define edx (edx_.val)
#define dx (edx_.w.val)
#define dl (edx_.w.b.l)
#define dh (edx_.w.b.h)

#define sp (esp_.w)
#define bp (ebp_.w)
#define si (esi_.w)
#define di (edi_.w)
#define ip (eip_.w)
#define U unsigned
#define P printf
void inc_w(union r32* a)
{++ a->w.val;}

void inc_l(union r32* a)
{++ a->w.b.l;}

void inc_h(union r32* a)
{++ a->w.b.h;}
int main(void)
{
eax = 0xFEFEFEFE; ebx = 0xFAFAFAFA;
P("eax=0x%x ebx=Ox%x\n", (int) eax, (int) ebx);
ecx=50000; edx=512341;
ecx += edx;
printf("somma=0 x%x ecx=0x%x\n", (int)(50000 + 512341), (int) ecx );
eax=0xFFFFFFFF;
printf("eax=0x% x ", (int) eax );
inc_w(&eax); /* inc ax ; or I would have to write inc_x(&eax_) ? */
P("inc ax -> eax=0x%x ax=0x%x\n", (int) eax, (int) ax );

eax=0xFFFFFFFF;
printf("eax=0x% x ", (int) eax );
inc_l(&eax); /* inc al */
P("inc ax -> eax=0x%x al=0x%x\n", (int) eax, (int) al );

eax=0xFFFFFFFF;
printf("eax=0x% x ", (int) eax );
inc_h(&eax); /* inc ah */
P("inc ah -> eax=0x%x ah=0x%x\n", (int) eax, (int) ah );

return 0;
}

/*
eax=0xfefefefe ebx=Oxfafafafa
somma=0x894a5 ecx=0x894a5
eax=0xffffffff inc ax -> eax=0xffff0000 ax=0x0
eax=0xffffffff inc ax -> eax=0xffffff00 al=0x0
eax=0xffffffff inc ah -> eax=0xffff00ff ah=0x0
*/

[RoSsIaCrIiLoIA]

On Thu, 24 Jun 2004 09:31:24 GMT, RoSsIaCrIiLoIA <[e-mail]> wrote:

This would be portable.

#include <stdio.h>
#include <stdint.h> /* or stddef don't remember for uintxx_t */

union r32{
uint8_t l;
uint16_t x;
uint32_t val;
};
/* all global */
union r32 eax_, ebx_, ecx_, edx_;
union r32 esi_, edi_, ebp_, esp_, eip_;
uint16_t cs, ds, es, ss, fs, gs, flags;

#define eax (eax_.val)
#define ax (eax_.x)
#define al (eax_.l)
#define ah ( (eax_.x>>8) & 0xFF ) /* not lvalue :-( */

#define ebx (ebx_.val)
#define bx (ebx_.x)
#define bl (ebx_.l)
#define bh ( (ebx_.x>>8) & 0xFF ) /* not lvalue */

#define ecx (ecx_.val)
#define cx (ecx_.x)
#define cl (ecx_.l)
#define ch ( (ecx_.x>>8) & 0xFF ) /* not lvalue */
#define edx (edx_.val)
#define dx (edx_.x)
#define dl (edx_.l)
#define dh ( (edx_.x>>8) & 0xFF ) /* not lvalue */

#define sp (esp_.x)
#define bp (ebp_.x)
#define si (esi_.x)
#define di (edi_.x)
#define ip (eip_.x)
#define U unsigned
#define P printf
void inc_x(union r32* a)
{++ a->x;}

void inc_l(union r32* a)
{++ a->l;}

void inc_h(union r32* a)
{uint8_t r;
/*-------------*/
r = ( a->x >>8) & 0xFF; ++r;
a->val = a->val & ( 0xFFFF00FF | (uint32_t) r << 8 );
}
int main(void)
{
eax = 0xFEFEFEFE; ebx = 0xFAFAFAFA;
P("eax=0x%x ebx=Ox%x\n", (int) eax, (int) ebx);
ecx=50000; edx=512341;
ecx += edx;
printf("somma=0 x%x ecx=0x%x\n", (int)(50000 + 512341), (int) ecx );
eax=0xFFFFFFFF;
printf("eax=0x% x ", (int) eax );
inc_x(&eax); /* inc ax ; or I would have to write inc_x(&eax_) ? */
P("inc ax -> eax=0x%x ax=0x%x\n", (int) eax, (int) ax );

eax=0xFFFFFFFF;
printf("eax=0x% x ", (int) eax );
inc_l(&eax); /* inc al */
P("inc ax -> eax=0x%x al=0x%x\n", (int) eax, (int) al );

eax=0xFFFFFFFF;
printf("eax=0x% x ", (int) eax );
inc_h(&eax); /* inc ah */
P("inc ah -> eax=0x%x ah=0x%x\n", (int) eax, (int) ah );

return 0;
}

[Case]

Eric Sosman wrote:

Case - wrote:

Dan Pop wrote:

In <40************ ***********@new s.xs4all.nl> Case <[e-mail]> writes:
The key idea is to map all parts of a CPU on C structures
and routines. For example: the program counter (PC) can
be simply mapped to an int variable.


An usigned integer type would be a much better choice for the program
counter. Ditto for the other integer registers.

I didn't say what kind of int, so technically what you propose
is covered by my statement ;-)

Yes, you're right, the PC is best typed as unsigned. I'm not sure
about the registers. Values in registers are seen as 2-s complement
by instruction in at least some CPU's (e.g., MIPS has pairs of
similar instructions for singed and unsigned register operand).

Note that you must issue the occasional no-op when
using instructions of the first type, to give the singed
registers time to cool.

You are talking about signed registers. I was talking about the
way a CPU may 'see' the value contained in a register. And we
are talking in the context of mapping CPU to C. Evidently,
reading other posts, you have much much more experience in CPU
design issues. I don't get your point, could you please elaborate?

Case