A good compiler will do this for you if you set it up to optimise for speed.
Adrian
The problem is far more complicated than people think: try to multiply 7*36
on a one byte (8 bits) processor; performing 8*36-1*36 using simple shifts
causes an overflow (8*36 == 288 which doesn't fit in a byte). Most compilers
try to play it safe so they generate 4*36+2*36+1*36 using shifts and additions.
Interchanging the multiplier and multiplicant woult've done a bit better here:
7*36 == 7*32+7*4 using shifts and additions without causing overflow.
The decision whether or not using compound instructions using two 8 bit
words and go for the 16 bit wide shifts versus using additional additions
differs per processor and can't be easily solved. Some processors, notably
the ARM/7 processor has the capability to shift 12 bit words to the left by 20
positions maximum in one single instruction including both operands.
That allows for every 32 bit word to be generated as long as the '1' bits are
no more than 11 positions apart.
Other processors have special barrel shifters in their ALU that can do other
funky things. The answer to the question 'which bit shift is best?' cannot be
easily answered. Google for 'shift for multiplication' and see the mess ;-)
kind regards,
Jos
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