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using a shell script to compile your C programs

Do you see anything wrong about this method ? For eg. I write a shell
script a.sh containing :

cc -o test file1.c file2.c file3.c

and then execute the shell script ( sh a.sh) to compile and create the
executable. What is the difference between this method and writing a
make file ?
Jun 27 '08 #1
16 9156
pereges wrote:
Do you see anything wrong about this method ? For eg. I write a shell
script a.sh containing :

cc -o test file1.c file2.c file3.c

and then execute the shell script ( sh a.sh) to compile and create the
executable. What is the difference between this method and writing a
make file ?
Not really topical here, try comp.unix.progr ammer

But: using a makefile would ensure that the target gets build afresh
whenever the source has changed (i.e is newer than the target), a shell
script would always compile, unconditionally , regardless whether it is
acctually neccessary.

Bye, Jojo
Jun 27 '08 #2
On 9 May, 08:14, "Joachim Schmitz" <nospam.j...@sc hmitz-digital.de>
wrote:
pereges wrote:
Do you see anything wrong about this method ? For eg. I write a shell
script a.sh containing :
cc -o test file1.c file2.c file3.c
and then execute the shell script ( sh a.sh) to compile and create the
executable. What is the difference between this method and writing a
make file ?

Not really topical here, try comp.unix.progr ammer
I think it's a lot more topical here than
comp.unix.progr ammer Essentially he's
asking about compiling methodology not
how to write a shell script and makefiles
are not Unix specific.
But: using a makefile would ensure that the target gets build afresh
whenever the source has changed (i.e is newer than the target), a shell
script would always compile, unconditionally , regardless whether it is
acctually neccessary.
And this is a topical reply.
Jun 27 '08 #3
pereges said:
Do you see anything wrong about this method ? For eg. I write a shell
script a.sh containing :

cc -o test file1.c file2.c file3.c

and then execute the shell script ( sh a.sh) to compile and create the
executable. What is the difference between this method and writing a
make file ?
Make files save on typing and braining. Which would you rather have to
remember and type: this...

$ cc -o test file1.c file2.c file3.c

or this?

$ make

It's no contest, right? Also, make only bothers to compile stuff that needs
compiling. If you haven't touched file3.c, why bother to recompile it? It
only needs to be re-linked. So if you separate compilation from linking,
you can save yourself some actual time.

--
Richard Heathfield <http://www.cpax.org.uk >
Email: -http://www. +rjh@
Google users: <http://www.cpax.org.uk/prg/writings/googly.php>
"Usenet is a strange place" - dmr 29 July 1999
Jun 27 '08 #4
Dan

"pereges" <Br*****@gmail. comwrote in message
news:a6******** *************** ***********@w34 g2000prm.google groups.com...
Do you see anything wrong about this method ? For eg. I write a shell
script a.sh containing :

cc -o test file1.c file2.c file3.c

and then execute the shell script ( sh a.sh) to compile and create the
executable. What is the difference between this method and writing a
make file ?
Nothing. As programs get more complicated that would have to many files to
type out, and make file you can write them to have the ability to only
recompile the files that have actually changed since last time, so large
projects compile much more quickly.
Jun 27 '08 #5
On 9 May, 08:37, Richard Heathfield <r...@see.sig.i nvalidwrote:
pereges said:
Do you see anything wrong about this method ? For eg. I write a shell
script a.sh containing :
cc -o test file1.c file2.c file3.c
and then execute the shell script ( sh a.sh) to compile and create the
executable. What is the difference between this method and writing a
make file ?

Make files save on typing and braining. Which would you rather have to
remember and type: this...

$ cc -o test file1.c file2.c file3.c

or this?

$ make
But he wouldn't type cc -o test file1.c file2.c file3.c
he would type ./myscript or something shorter.
In any case for short programmes not using a
makefile is fine. And you don't even need a shell
script, the first time you compile you type the
whole cc... stuff but from then on just !cc
Jun 27 '08 #6
On May 9, 12:37 pm, Richard Heathfield <r...@see.sig.i nvalidwrote:
>
Make files save on typing and braining. Which would you rather have to
remember and type: this...

$ cc -o test file1.c file2.c file3.c

or this?

$ make

It's no contest, right? Also, make only bothers to compile stuff that needs
compiling. If you haven't touched file3.c, why bother to recompile it? It
only needs to be re-linked. So if you separate compilation from linking,
you can save yourself some actual time.
hello, i think this C program for generating make files on linux was
written by you which I found by searching through archives :

---------------------------------------------------------------------------------------------------
#include <stdio.h>

void genflags(void)
{
puts("CC=gcc");
puts("CFLAGS=-W -Wall -ansi -pedantic -O2");
puts("DFLAGS=-g -pg");

}

void makeprg(int argc, char **argv)
{
int i = 0;
printf("%s: %s.o", argv[1], argv[1]);
for(i = 2; i < argc; i++)
{
printf(" %s.o", argv[i]);
}
printf("\n\t$(C C) $(CFLAGS) $(DFLAGS) -o %s %s.o", argv[1],
argv[1]);
for(i = 2; i < argc; i++)
{
printf(" %s.o", argv[i]);
}
putchar('\n');

}

void makeobjs(int argc, char **argv)
{
int i = 0;
for(i = 1; i < argc; i++)
{
printf("%s.o: %s.c\n", argv[i], argv[i]);
printf("\t$(CC) $(CFLAGS) $(DFLAGS) -c -o %s.o %s.c\n", argv[i],
argv[i]);
}
putchar('\n');

}

void makeclean(int argc, char **argv)
{
int i = 0;
printf("clean:\ n");
for(i = 1; i < argc; i++)
{
printf("\trm %s.o\n", argv[i]);
}
printf("\trm %s\n", argv[1]);
putchar('\n');
}

void makeinstall(int argc, char **argv)
{
printf("install :\n");
printf("\tcp %s /usr/local/bin\n", argv[1]);
putchar('\n');

}

int main(int argc, char **argv)
{
if(argc 1)
{
genflags();
makeprg(argc, argv);
makeobjs(argc, argv);
makeclean(argc, argv);
makeinstall(arg c, argv);
}
else
{
fputs("Usage: makegen progname [sourcename*]\n", stderr);
}
return 0;

}

----------------------------------------------------------------------------------------------------
I would like to use this for my project. Can you please tell me what
is the purpose behind the functions makeclean and makeinstall ?
Jun 27 '08 #7
On May 9, 12:39 pm, Spiros Bousbouras <spi...@gmail.c omwrote:
>
But he wouldn't type cc -o test file1.c file2.c file3.c
he would type ./myscript or something shorter.
In any case for short programmes not using a
makefile is fine. And you don't even need a shell
script, the first time you compile you type the
whole cc... stuff but from then on just !cc
Yes, but if you want to add new modules to your project then the shell
script has to be changed.
Jun 27 '08 #8
pereges said:

<snip>
>
I would like to use this for my project.
It's rather primitive, but yes, it works. Feel free.
Can you please tell me what
is the purpose behind the functions makeclean and makeinstall ?
Sometimes things can get a little out of kilter - for example, your system
clock might be re-set for some reason (e.g. daylight savings), and the
make system gets a bit confused as to what dependencies need to be
re-compiled. Or maybe a library dependency has been updated and you need
to force a complete re-link. Or whatever. By typing

make clean

you delete all the object files and the executable, so that a subsequent
make will do a complete re-build. It's not often necessary, but it's
sometimes useful.

Once you're happy that a program is complete, you may well wish to copy it
to a directory that is in your path.

make install

is intended to do that. (On some systems, you may need to get root access
before doing a make install.)
--
Richard Heathfield <http://www.cpax.org.uk >
Email: -http://www. +rjh@
Google users: <http://www.cpax.org.uk/prg/writings/googly.php>
"Usenet is a strange place" - dmr 29 July 1999
Jun 27 '08 #9
"Dan" <vo***@sometwhe r.worldwrites:
"pereges" <Br*****@gmail. comwrote in message
news:a6******** *************** ***********@w34 g2000prm.google groups.com...
>Do you see anything wrong about this method ? For eg. I write a shell
script a.sh containing :

cc -o test file1.c file2.c file3.c

and then execute the shell script ( sh a.sh) to compile and create the
executable. What is the difference between this method and writing a
make file ?

Nothing. As programs get more complicated that would have to many files to
type out, and make file you can write them to have the ability to only
recompile the files that have actually changed since last time, so large
projects compile much more quickly.
This is totally wrong. There is a lot of difference. For a start this
will always compile all the files. Make only compiles the ones which
have changed.

Jun 27 '08 #10

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