data bus model...

[yaduraj]

Hello All,

I have some basic questions regarding the implementation of a data bus
model in a simulator.

Its hard for me to realize how to model something of that sort in a
simulator..supp ose I need to model a 200mhz bus and contention on
it..for data coming from memory.

I copied fraction of code that does this..but I am not sure if it does
what it is supposed to do..I have limited knowledge in modelling such
implementations ..I will be grateful if anybody could guide me in this
manner..

#define BOUND_POS(N) ((int)(MIN(MAX( 0, (N)), 2147483647)))
data_bus_width = 8; //8 bytes
req_size = 6;

data_bus_access (){
bus_cycles = (req_size + data_bus_width - 1) * (0.2) *
(multiplier) / data_bus_width;

//used 0.2 above for 200mhz

busy_until = req_time + (bus_cycles);
busy_until += BOUND_POS(bus_f ree - (req_time + busy_until));
total_bus_cycle s += (bus_cycles);

bus_free = max(bus_free, (req_time + busy_until)) + 1;

}

return (busy_until - req_time); //has to return bus delay for this
access..
}

any suggestions or corrections in this regard will help me a lot..
thanks in advance...

yaduraj

[yaduraj]

Hello dandelion,

Thanks so much for your reply...

I understand what you are saying ..

"dandelion" <da*******@mead ow.net> wrote in message news:<41******* **************@ dreader17.news. xs4all.nl>...

"yaduraj" <ya******@yahoo .com> wrote in message
news:36******** *************** ***@posting.goo gle.com...

Hello All,

I have some basic questions regarding the implementation of a data bus
model in a simulator.

Its hard for me to realize how to model something of that sort in a
simulator..supp ose I need to model a 200mhz bus and contention on
it..for data coming from memory.
Think of bus-speed in a simulator not in terms of Mhz but of (say) MBogoHz.
That is, *you* (and not the SI) determine how long one bus-cycle takes in
actual seconds. Simulated time itself is no more than a counter (if I were
you i'd think about making that at least a 64 bit counter, btw).

This will enable you to "single step" in simulated "time" and make your
simulator more usefull.

I copied fraction of code that does this..but I am not sure if it does
what it is supposed to do..I have limited knowledge in modelling such
implementations ..I will be grateful if anybody could guide me in this
manner..

#define BOUND_POS(N) ((int)(MIN(MAX( 0, (N)), 2147483647)))

Consider writing binary constant in hex.
0x7FFFFFFF is easyer to remember (and transform into actual bits) than
2147483647.

data_bus_width = 8; //8 bytes
req_size = 6;

data_bus_access ()

I think you'd like to provide the bus input (the actual request) as a
argument
to this function. For instance

data_bus_access (char* value)

furthermore, you do not simply *acces* a bus, you either read from it or
write to it. The difference is significan since a bus can be connected to
any number of peripheral devices. All of them can read at the same time from
the same bus, but only one of them can write to it.

The bus access function in my case is freed of deciding the order of
operations..the re is another function that just feeds reads and writes
to the bus access function..there can be a number of requests that go
in the same cycle to the bus.
If two (or more) devices attempt to write to the bus "simultaneously "
(within one cycle) the result is a "bus-conflict" or "bus-collision". It
would be desirable to catch this if you are writng a simulator.

On the other hadn, if you are reading from a bus, and no device wrote to it,
the data you'd get would be less than exactly what you'd desire. It would be
convenient to catch this situation aswell.

So you'd have

* a struct containing the data about the bus

struct bus_s
{
char bus_data[BUS_WIDTH]; /* containing the data currently on the bus
*/
unsigned long device_id; /* the device which wrote the data
*/
};

* and three functions:

bus_write(struc t bus_s* bus, unsinged int device_id, char* data);

which will set a value and set the device_id, but only if and only if the
device_id is not set (or set to some value designated NO_DEVICE). Otherwise,
it will generate an diagnostic message.

bus_read(struct bus_s* bus, char* data);

which will get a value , but only if and only if the device_id is set.

bus_clear(struc t bus_s*);

which simply clears the device id and prepares the bus_s structure for the
next write.

bus_cycles = (req_size + data_bus_width - 1) * (0.2) *
(multiplier) / data_bus_width;

//used 0.2 above for 200mhz
The actual "frequency" in a simulator (as mentioned above) is very hard to
guarantee. The 200Mhz,
when running your simulator, will almost certainly not be 200Mhz, since your
processor will have other tasks running in the background. Switch to an
explicit "simulated time" (the counte mentioned above) and just define one
'tick' to be 1/F "seconds", where F is your "clock-frequency" (the simulated
one).

this helps me..

The logic of the calculation above escapes me. If you are using a 64 bit bus
(as you indicate), 64
bytes *will* be transmitted at a time. So request len is not really a factor
in the bus-busy time.

Each request can be different in size..for instance one request can be
6 bytes and one can be 2 bytes so I was using the req size in the
simulator..what I more interested is modelling this contention and
situations when bus can be busy and the next request has to wait for
some time until the bus is freed..this is where I am faltering ..any
inputs on this.I will be grateful..
Thanks
Regards
Yaduraj
HTH,

Regards,

dandelion (... who once wrote something simular... )