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designing a mapping logic for a very simple microsequencer

I am a student at NYIT and am taking a class on computer organization and architecture. The textbook we are using is very difficult and complicated to understand. I understand everything to a certain point then I get confused. I am looking for another textbook or a website that would help my classmates and myself.

In order to design the mapping logic I must take into consideration the allocation of the addresses for the first state of each execute routine. I have a problem where I designed a mapping logic that works for the first three execute routines (ADD1 0011; AND1 0011; JMP1 0111) but will not work for the fourth execute routine (INC1 1000). Any suggestions or advice)

Thank You,
Rob
Aug 22 '07 #1
4 2243
pbmods
5,821 Expert 4TB
Heya, Rob. Welcome to TSDN!

I'm going to go ahead and move this thread to the Software Development forum, where our resident Experts will be better able to help you out.

What do you want your code to do? Give an example.
What is your code doing that you don't want it to do? Give an example.
What is your code *not* doing that it is supposed to? Give an example.
Aug 22 '07 #2
drhowarddrfine
7,435 Expert 4TB
This should be under miscellaneous, I think.

Are you using boolean logic? I think we need to see the whole thing to understand what is not working.
Aug 22 '07 #3
JosAH
11,448 Expert 8TB
Too bad this thread is dead too; as well as so many other threads that could've
been quite interesting. Oh well ...

kind regards,

Jos
Aug 28 '07 #4
drhowarddrfine
7,435 Expert 4TB
Sure. Just give up. Quitter.
Sep 5 '07 #5

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