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Automatic Schematic Generation (System Graph) and Viewer

Hi all,

I'm developing a System Description Language (which could be used as
an HDL in particular) called ForSyDe: http://www.ict.kth.se/info/FOFU/ForSyDe/

I'm planning to add a backend to my compiler wich generates a
graphical representation of the system.

To my surprise, I havent found any tool which generates a schematic or
system graph given a HDL model. Does anyone know any of them?

Does any one know about a specific, open file format for schematics?
My best options so far are GXL (http://www.gupro.de/GXL/) and GraphML
(http://graphml.graphdrawing.org/) but I coudn't find any free viewer
with automatic routing support.

Any help would be appreciated. Thanks in advance,

Alfonso Acosta

Jul 19 '07 #1
3 4210
On Jul 19, 6:17 am, Alfonso Acosta <alfonso.aco...@gmail.comwrote:
To my surprise, I havent found any tool which generates a schematic or
system graph given a HDL model. Does anyone know any of them?
Try the Alliance VLSI CAD, it is free and open source.

http://www-asim.lip6.fr/recherche/alliance/

One of its tools, boog can take a HDL model and generates a schematic
which can be read with its xsch schematic viewer.

PS: try it under a redhat or fedora based distribution or its clones.
On a debian based distro, I had problems in installing alliance to be
used with other commercial products.

Chitlesh

Jul 23 '07 #2
krw
In article <11**********************@x35g2000prf.googlegroups .com>,
al************@gmail.com says...
Hi all,

I'm developing a System Description Language (which could be used as
an HDL in particular) called ForSyDe: http://www.ict.kth.se/info/FOFU/ForSyDe/

I'm planning to add a backend to my compiler wich generates a
graphical representation of the system.

To my surprise, I havent found any tool which generates a schematic or
system graph given a HDL model. Does anyone know any of them?
Synplify Pro does (with HDL Analyst). It also generates bubble
charts (something you might think about doing also).

<snip>

--
Keith
Jul 23 '07 #3
On Jul 23, 6:06 am, krw <k...@att.bizzzzwrote:
In article <1184818661.311313.125...@x35g2000prf.googlegroups .com>,
alfonso.aco...@gmail.com says...
Hi all,
I'm developing a System Description Language (which could be used as
an HDL in particular) called ForSyDe:http://www.ict.kth.se/info/FOFU/ForSyDe/
I'm planning to add a backend to my compiler wich generates a
graphical representation of the system.
To my surprise, I havent found any tool which generates a schematic or
system graph given a HDL model. Does anyone know any of them?

Synplify Pro does (with HDL Analyst). It also generates bubble
charts (something you might think about doing also).

<snip>

--
Keith
Quartus II also has an RTL view and state-machine bubble viewer.
ModelSim does as well. In fact, do any of the major tools NOT have a
schematic viewer?

Shannon

Jul 23 '07 #4

This thread has been closed and replies have been disabled. Please start a new discussion.

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