On 6 Jun 2007 22:06:35 GMT,
ri*****@cogsci.ed.ac.uk (Richard Tobin)
wrote:
In article <f4***********@smof.fiawol.org>,
John Cochran <jd*@smof.fiawol.orgwrote:
I have a vague memory from many years back about what I believe was a
Honeywell mainframe (36 bit words, 18 bit addressing). One of the features
of this beast was indirect addressing where if a bit was set in a word
when it was accessed, it indicated that the word should be used as an
address pointing to where the actual parameter was. And if *that* had that
magic bit set, then it was also an address pointing to where the actual
parameter was. This indirection could in theory go quite a distance. However
I don't know about Honeywell, but DEC/Digital PDP-10 definitely had
that feature, and I believe also the earlier PDP-6 from which the -10
derived. More precisely, most instructions (aside from some special
cases) have a register-memory aka 1.5-address format, containing an
actual (well, virtual on later models) 18-bit address, a 4-bit index
register number which if nonzero causes that register's contents to be
added, and a (single) indirect bit which if set causes the result to
be treated not as the address of the operand, but as the address of an
indirect word which in turn contains address, index, and indirect
bits, thus iterating possibly multiple times.
the computer would throw an exception if too many levels of indirection
were being used. I don't remember how many levels this was.
AIR the actual CPUs had a limit on _clocks_ for a single indirect
chain. But in those days hardware, especially core memory, (almost
always) had a fixed cycle time and latency, so this was effectively a
limit on levels of indirection. One popular emulator now available
(SIMH) does just hardcode a limit of 32.
But given that the above feature could be used to implement pointer to pointer
to ..... in a fairly efficient C implementation. I can see a "must be able
to do at least X levels of indirection" requirement based upon the limits
of the computers with this capability.
I doubt C has ever been implemented on that architecture by setting
the relevant bit in pointers. If we have char *****p, then both **p
and ****p are legal expressions: the number of dereferences is
controlled by the program, not the data. C doesn't have a
"dereference as much as you can" operator.
Concur.
Now this is pure speculation, but I wouldn't be surprised if there exists
a modern computer that has this indirect capability and has a limit on
how many levels of indirection it's willing to perform without causing
an exception.
I *would* be surprised if there was such a modern computer.
I also -- but pleasantly surprised. :-)
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