445,645 Members | 1,048 Online Need help? Post your question and get tips & solutions from a community of 445,645 IT Pros & Developers. It's quick & easy.

# two's complement done before storage or on the fly while computing

 P: n/a Hi, Is two's complement always used as a storage method or is it computed while computing the expression involved. e.g., int a = -2, b = 3, c = 4, d; d = b - c; Here, is 'a' stored as two's complement of '2'? or is '-c' (two's complement of c) computed on the fly and the resulting value is added to b ( b + (-c))? Joe Nov 15 '05 #1
7 Replies

 P: n/a On Fri, 26 Aug 2005 02:34:16 -0700, Greenhorn wrote: Hi, Is two's complement always used as a storage method or is it computed while computing the expression involved. e.g., int a = -2, b = 3, c = 4, d; d = b - c; Here, is 'a' stored as two's complement of '2'? The value -2 is stored in a. On implementations that use 2's complement to represent negative numbers the appropriate 2's complement representation will be used. 2's complement isn't required though, 1's complement and sign-magnitude are also possible. The actual representation used is rarely important, all you need to know is that the value -2 is stored in a. or is '-c' (two's complement of c) computed on the fly and the resulting value is added to b ( b + (-c))? C could be negated and added to b (again there's no need to assume 2's complement), but if the processor has a subtract instruction (and most do) it is more likely that that would be used instead. This is an implementation issue, as long as the correct result is produced the compiler can generate whatever code it likes. You seem to be very focussed on the representation used and 2's complement in particular. C defines arithmetic operations in terms of values, not representations so don't worry about it. Lawrence Nov 15 '05 #2

 P: n/a hi lawrence, thanks for the reply, I intended to ask how the machine's which use two's complement deal with these. You say that most processor's today have subtract instruction, do they have a circuit for computing subtraction or do they internally use some thing like two's complement in evaluating the expression (e.g., b - c) greene Nov 15 '05 #3

 P: n/a Greenhorn wrote: please leave some context in. The original question was about two's complement arithmetic I intended to ask how the machine's which use two's complement deal with these. You say that most processor's today have subtract instruction, do they have a circuit for computing subtraction or do they internally use some thing like two's complement in evaluating the expression (e.g., b - c) you are now asking questions about the internals of the hardware. If my vague recollections about hardware are correct then one reason for using twos complement is its pretty easy to build a common add/subtract unit. Ie. it can do both depending on the setting of a flag. Consider that subtraction is adding a negative. So subtraction is complement and add. You may want to think about taking these questions to a computer architecture group. -- Nick Keighley Nov 15 '05 #4

 P: n/a Hi, yes you are correct that two's complement was used to reduce to the costs involved in putting another circuit for performing a subtraction operation. I had to switch to the hardware level as the answer by 'lawrence' says that today there are machines which do support subtraction , i wasn't sure if he meant that with those machines there is no need of something like two's complement notation. greene Nov 15 '05 #5

 P: n/a "Greenhorn" wrote: # Hi, # Is two's complement always used as a storage method or is it computed # while computing the expression involved. Within C alone, you can only discern such things when you operate on the value, for example when you convert to hex (printf("%x",value)) or mix integer and bits operations (like (-1)^(~1)). Outside the CPU, you really cannot tell. However no hardware I've ever heard does this kind of conversion between the CPU and memory. # e.g., int a = -2, b = 3, c = 4, d; # d = b - c; # # Here, is 'a' stored as two's complement of '2'? # or # is '-c' (two's complement of c) computed on the fly and the resulting # value is added to b ( b + (-c))? Depends on the CPU. Some old CPUs (like PDP-8) didn't have a subtract instruction. Instead they would zero the accumulator, add c, complement and increment c, and then add b, then store in d while clearing the accumulator. There's also constant folding. An optimising compiler would see that in this fragment d = b-c b = 3 c = 4 d = 3-4 d = -1 and do the entire computation during compilation. All that might be left is a store of -1 into d. -- SM Ryan http://www.rawbw.com/~wyrmwif/ A bunch of savages in this town. Nov 15 '05 #6

 P: n/a "Greenhorn" wrote I intended to ask how the machine's which use two's complement deal with these. Virtually every machine uses two's complement, and it is reasonably safe to assume that you have it on the rare occasions when you need to access bit values directly. However it is not the only possible method for representing negative numbers. Floating-point formats, for example, almost always use a flag bit to represent a negative. C doesn't make any requirements, though it is implict that the C representation will also be the underlying hardware representation. You say that most processor's today have subtract instruction, do they have a circuit for computing subtraction or do they internally use some thing like two's complement in evaluating the expression (e.g., b - c) When you say "most processors" do you mean "the processor which my learner C program is likely to run on" or do you mean "the randomly-selected processor from the set of all in existence"? Most processors are not 3 giga hertz Intel jobs that sit in PCs, but little embedded control devices that keep fridges at the right temperature or make the dolly cry when her dummy is removed. C is a major language for programming these chips. You can get away without a "subtract" instruction by using the procedure invert, increment, add (discarding overflow) as long as you use two's complement. So the C expression x = a - b might well resolve to those three machine language instructions. If you have a dedicated "subtract" instruction, the complier will usually use it in preference, because the chip designers include it to speed things up. On a PC, there will always be a subtract instruction. On a little embedded device, maybe not. Nov 15 '05 #7

 P: n/a On Fri, 26 Aug 2005 07:33:09 -0700, Greenhorn wrote: Hi, yes you are correct that two's complement was used to reduce to the costs involved in putting another circuit for performing a subtraction operation. If you have an add instruction then it is about as easy to adapt to to support subtraction using 1's complement. It is even easier with sign-magnitude since all you have to do is flip the sign bit of the value you are subtracting. The reasons for using 2's complement are different. For example when the result is represented using the same width as the operands 2's complement addition and subtraction use the same bit manipulations as unsigned addition and subtraction, just with different conditions for overflow. This means that the hardware doesn't have to support different instructions for signed and unsigned arithmetic. I had to switch to the hardware level as the answer by 'lawrence' says that today there are machines which do support subtraction , i wasn't sure if he meant that with those machines there is no need of something like two's complement notation. Numbers have to be represented in one form or another. Compilers for machines that support a subtraction instruction will generally use that instead of some sequence of negation and addition, because it is likely to be more efficient. OTOH the compiler could generate negation and addition if it wants to, as long as the code works it doesn't matter as far as C is concerned. Lawrence Nov 15 '05 #8

### This discussion thread is closed

Replies have been disabled for this discussion. 