Hello,
Baloff wrote:
#ifdef DEBUG
#define P(A) cout << #A << ": " << (A) << endl;
#endif
And what shall happen if DEBUG is not defined, if the macro P is not
defined, you will get syntax errors. Therefore:
#ifdef DEBUG
#define P(A) cout << #A << ": " << (A) << endl;
#else
#define P(A)
#endif
******************************makefile************ ******************
CPP= g++
proj1: main.o
$(CPP) main.o -o proj1
#main.o: main.cpp
.SUFFIXES: .o .cpp
..cpp.o:
$(CPP) -DDEBUG -c $<
# comment: no debug: $(CPP) -c $<
You violate a lot of conventions. Usually (at least in GNU make) there
is the variable CXX for the C++ compiler, and CXXFLAGS for flags for
the C++ compiler. If you use the builtin rule of make for C++, i.e. .cc
to .o, you may just write
proj1: main.o
$(CXX) $(CXXFLAGS) $(LDFLAGS) -o $@ $^
CXXFLAGS=-DDEBUG
Read the make manual about predefined rules and variables. There is a
predefined rule for compiling single .cc files to .o files. And there
is a predefined rule for compiling and linking a single .cc file to an
executable, i.e. proj1.cc to executable proj1. Everything else you have
to provide yourself in the makefile. And take care to not break
existing conventions, or nobody will be able to understand your
makefiles. The variable CPP is used for the preprocessor executable.
There are libraries out supporting logging, so search the Web to save
yourself from reinventing the wheel. Or do you do this for educational
purposes?
Bernd Strieder