question on mips and code

gdarian216

hey I have a question on understanding a few things. Im trying to understand
the following structure of a instruction register.
Op code, Address-1, Address-2, are 6 bits, 18 bits, 18 bits respectively

What is the maximum number of distinct operation codes that can be recognized and executed by the processor on this machine?

would this be 64 which is base 2 to the 6th. or am i doing it wrong

What is the maximum memory size on this machine?

and would this be a 32bit machine?

im not sure so if anyone can tell me if im on the rt track

Savage

Quote:

Originally Posted by gdarian216

hey I have a question on understanding a few things. Im trying to understand
the following structure of a instruction register.
Op code, Address-1, Address-2, are 6 bits, 18 bits, 18 bits respectively

What is the maximum number of distinct operation codes that can be recognized and executed by the processor on this machine?

would this be 64 which is base 2 to the 6th. or am i doing it wrong

What is the maximum memory size on this machine?

and would this be a 32bit machine?

im not sure so if anyone can tell me if im on the rt track

If the IR's OP code is 6 bytes then there are 64 different OP codes.
It should be 64bit machine,I think.

Savage

RRick

The address size is only 18 bits, so in theory you'll only need an 18 bit machine. Your available memory is 2 ** 18 "things". "Things" depends on how big your basic chunk of data is.

We typically deal with 8 bit bytes, but your basic chunk could be 6 bits or whatever.

JosAH

Quote:

Originally Posted by gdarian216

would this be 64 which is base 2 to the 6th. or am i doing it wrong

You're correct.

kind regards,

Jos

question on mips and code

re: question on mips and code

re: question on mips and code

re: question on mips and code

Similar C / C++ bytes

/bytes/development

/bytes/it

/bytes/about